1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having a plurality of semiconductor chips and a method of manufacturing the same.
2. Description of the Related Art
In a semiconductor device having a plurality of semiconductor chips, a unique identification number should be assigned to each of the semiconductor chips to identify individual semiconductor chips. This holds true for a multilayered semiconductor device having a plurality of semiconductor memory chips stacked thereon.
In a related multilayered semiconductor device, an arithmetic circuit is provided on each of stacked semiconductor chips. An output of a lower-layer arithmetic circuit is used as an input to an upper-layer arithmetic circuit. Thus, each of the semiconductor chips is configured to generate a unique identification number. See, e.g., US 2007/0126105 A1 (JP-A 2007-157266: Patent document 1).
The present inventor has recognized that in the semiconductor device disclosed in Patent document 1, an arithmetic circuit is provided on each of the semiconductor chips and therefore, circuits relating to assignment of identification numbers are complicated and a large area is required for those circuits.